Senior Debug Validation Engineer

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems. The team works across the full product lifecycle, supporting first silicon bring-up, subsystem validation, system integration and production readiness activities. Engineers collaborate closely with hardware, firmware, software and systems teams to investigate complex failures, develop debug methodologies and improve validation infrastructure. Responsibilities and Duties Lead post-silicon debug and validation activities for AI compute silicon and platform technologies Contribute to debug and validation activities across multiple projects and milestones Drive prioritisation, planning and execution of debug and validation activities across multiple projects and milestones Investigate and resolve complex silicon, firmware, software and system-level issues during bring-up and validation Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency Collaborate closely with architecture, RTL, firmware, software and systems engineering teams to identify root causes and implement corrective actions Drive debug of CPU, memory, interconnect and high-speed I/O subsystems under functional, stress and workload conditions Develop and enhance automated debug, regression and validation infrastructure using Python and related technologies Analyse logs, traces, telemetry and hardware data to isolate and characterize system failures and performance issues Support development of validation tests, debug tooling and custom diagnostics to improve coverage and observability Define validation metrics, debug workflows and reporting standards to ensure consistent and repeatable analysis Drive continuous improvement of debug processes, validation methodologies and engineering workflows Communicate technical risks, status and recommendations clearly to engineering leadership and cross-functional stakeholders Support silicon readiness reviews and contribute to product quality and release decisions Contribute to continuous improvement of debug methodo