Advanced Technology: R&D Engineer - AI/ML, HPC

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras , to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation. About The Team Cerebras builds wafer-scale AI processors—single chips delivering tens of PB/s of memory bandwidth and a dataflow architecture that accelerates at a granularity no multi-device system can match. The Advanced Technology Group (ATG) is Cerebras ’ pathfinding organization. We work ahead of product to explore new architectures, demonstrate breakthrough performance on scientific and AI workloads, and shape the technical roadmap for future Cerebras hardware and software. Our work regularly appears at top-tier venues (Supercomputing, SIAM, IEEE, and NeurIPS ) and directly influences the design of next-generation wafer-scale systems. About The Role We are seeking R&D Engineers to join Cerebras' Advanced Technology Group. You will design and implement workloads that establish new performance benchmarks on wafer-scale hardware, leveraging architectural features that no traditional platform offers. The scope ranges from large-scale scientific simulations to emerging AI/ML models, and the work sits at the intersection of algorithm design, compiler co-optimization, and hardware architecture. You will collaborate closely with Cerebras’ ASIC, compiler, kernel, and AI teams as well as external partners at universities and national laboratories. What You Will Do Design and implement challenging scientific computing and AI workloads on Cerebras’ Wafer-Scale Engine, targeting performance results that advance the state of the art. Lead algorithm–hardware co-design efforts with internal R&D teams and external research partners, turning architectural capabilities into measurable application-level advantages. Build analytical performance models that quantify bottlenecks, guide optimization, and inform future chip and compiler design decisions. Contribute to Cerebras’ multi-year technology roadmap by identifying high-impact workloads, proposing architectural experiments, and validating them on silicon. Publish findings and present at top-tier conferences and journals; represent Cerebras in the broader HPC and AI research communities. What We Are Looking For PhD in Computer Science, Engineering, Applied Mathematics, Physics, or a related quantitative field preferred . Exceptional candidates without a graduate degree who demonstrate equivalent depth through published research, significant open-source contributions, or a strong industry track record are encouraged to apply. Deep experience in at least one of the following: computer architecture and accelerator design; parallel, distributed, or high-performance computing; numerical methods and scientific simulation; AI/ML theory and model design at a mathematical level. Strong ability to analytically model and optimize the performance of complex systems and algorithms. Track record of published research or patents in relevant venues. Proficiency in C and Python; comfort wor