System Power Engineer, Principal

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI. System Power Engineer, Principal Location: Santa Clara, CA (Hybrid) Team: Hardware Engineering / Power Architecture About the Role As the Principal System Power Engineer, you will be the lead architect for the energy backbone of our AI accelerators. This role is unique in its breadth, spanning from the MCM (Multi-Chip Module)/Chiplet-level power distribution through the PCBA and into the system-level power shelf. You will solve the formidable challenge of delivering thousands of amps to high-performance silicon while maintaining razor-sharp power integrity. You aren't just managing power; you are engineering the efficiency and stability that makes large-scale AI inference possible. Key Responsibilities - Power Architecture & Design: Architect end-to-end power delivery solutions for high-TDP AI accelerators, focusing on multi-phase VRMs (Voltage Regulator Modules) and Point-of-Load (PoL) converters. - MCM & Chiplet Power Delivery: Lead the definition of power delivery for chiplet-based architectures, including substrate PDN, micro-bump current density analysis, and transient response optimization at the die-to-die interface. - Power Integrity (PI) Leadership: Drive the PI strategy across the board and package. This includes performing/overseeing DC drop analysis, AC impedance profiling (Z_target), and decoupling capacitor optimization to mitigate high-frequency noise. - Cross-Functional Validation: Partner with the Hardware Qualification and SI/PI teams to define validation suites. You will lead the correlation between simulation results and lab measurements using specialized tools like power emulators and high-bandwidth probes. - ODM & Partner Management: Drive technical requirements and design reviews with ODM partners, ensuring that outsourced PCBA designs meet d-Matrix’s stringent power efficiency and noise floor standards. - Thermal & Mechanical Synergy: Collaborate with thermal engineers to optimize the layout for heat dissipation while maintaining low-impedance power paths. Required Qualifications - Education: BS/MS/PhD in Electrical Engineering or a related technical field. - Experience: 12+ years of experience in power electronics and system-level power delivery for HPC, GPUs, or Data Center hardware. - Technical Mastery: - Expert knowledge of DC-DC converter topologies (Buck, Multiphase, TLVR). - Deep understanding of PDN modeling and simulation (e.g., Ansys SIwave, Cadence Sigrity/CST). - Experience with high-current transients (di/dt) associated with 5nm/3nm process nodes. - Hands-on Validation: Proficiency with high-speed scopes, electronic loads, and FRA (Frequency Response Analyzers) for Bode plot and impedance measurements. - MCM Experience: Proven track record of designing power for complex packages or multi-die modules. Preferred Skills - Familiarity with Vertical Power Delivery (VPD) or back-side power delivery technologies. - Experience with 48V-to-12V intermediate bus conversion and Open Compute Project (OCP) power specifications. - Understanding of PMBus/I2C/SVI3 protocols for telemetry and power management. Why Join d-Matrix? We are pushing the limits of "Power-per-Watt" in the AI space. In this role, you will have the autonomy to choose the best-in-class components and architectures to ensure our Digital In-Memory Computing technology runs at peak performance with maximum reliability. Equal Opportunity Employment Polic