Senior Signal Integrity Engineer

Signal Integrity Engineer –1.6T OSFP Board Design Bengaluru, Karnataka, India / Onsite ABOUT LUMILENS At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient. We’re a well-funded startup backed by Mayfield and led by veterans who’ve built And scaled some of the most transformative technologies in the industry. This isn’t incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from the silicon up. You’ll work alongside a team of world-class engineers solving some ofthe hardest challenges in optics, systems, and scale. Every line of code, every design decision, every breakthrough you help deliver will shape the infrastructure of tomorrow. If you're looking for mission, momentum, and the chance to make an outsized impact jump on the rocket ship. We’re just getting started. Role Overview We are seeking a senior SI Engineer with 15–20 years of experience to lead board‑level high‑speed electrical design and validation for 1.6T DR8 (200G/lane) OSFP optical modules, including technical leadership across multiple projects and mentoring of the SI team. Key Responsibilities: - Own SI/PI architecture and strategy for 1.6T DR8 OSFP modules: define channel budgets, interface architectures, and design rules for 200G PAM4 lanes from ASIC/DSP to front‑panel. - Lead pre‑ and post‑layout SI/PI simulations and reviews (S‑parameters, eye/PAM4 analysis, COM, crosstalk, jitter, PDN impedance) and sign‑off multi‑lane channels on dense module PCBs. - Define PCB stack‑ups, materials (e.g., ultra‑low‑loss laminates), via and breakout strategies, connector selections, and routing guidelines to meet performance, cost, and manufacturability targets. - Drive cross‑functional technical decisions with hardware, optics, mechanical, FW, and test teams, balancing SI/PI requirements against thermal, mechanical, and system constraints. - Lead lab correlation and validation plans: fixture/board design, TDR/VNA/BERT/oscilloscope measurements, de‑embedding strategies, and sign‑off criteria for engineering builds and production. - Provide technical leadership for SI‑related debug on proto and field issues, driving structured root‑cause analysis and design/process improvements across products. - Establish and maintain company‑wide SI/PI design methodologies, checklists, and documentation for current and future OSFP/QSFP‑class platforms. - Mentor and coach junior and mid‑level SI/hardware engineers; review and approve their simulations, reports, and design decisions. Required Qualifications: - B.E/B.Tech http://B.Tech or M.E/M.Tech http://M.Tech (or equivalent) in Electrical/Electronics Engineering with 15–20 years of relevant high‑speed SI/PI and board‑level design experience. - Deep expertise in very high‑speed SerDes (≥56G, strongly preferred 100G/200G PAM4) including channel modeling, equalization strategies, jitter/crosstalk analysis, and margining. - Extensive hands‑on experience with leading SI/PI tools (e.g., Sigrity, ADS, HFSS, SIwave, HSPICE or equivalents) and scripting/automation for simulation and report generation. - Proven track record bringing complex high‑speed hardware or optical modules from concept through production, including multiple design spins and volume manufacturing support. - Strong lab expertise with high‑bandwidth scopes, VNAs, BERTs, and TDRs, including correlation of measurements to simulations and management of external labs/vendors when needed. - Demonstrated ability to lead cross‑functional design reviews, influence architecture, and communicate complex SI/PI concepts clearly to both technical and non‑technical stakeholders. Preferred Qualifications: - Direct experience with OSFP/OSFP‑XD/QSFP‑DD optical transceiver designs at 800G/1.6T or similar data‑center interconnects, including familiarity wit