ASIC Diagnostic & Silicon Bring-Up Engineer

About Eridu Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI . Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability. The company’s solutions and value proposition have been widely validated by leading hyperscalers. Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the-art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems. Visit our website eridu.ai to learn more. Position Overview We are looking for a Senior ASIC Diagnostics Engineer to drive post-silicon bring-up, debug, and validation of next-generation high-performance ASICs. This role focuses on building diagnostic infrastructure, automation frameworks, and debug tools to validate ASIC functionality across SERDES, high-speed interfaces, and packet processing pipelines. The ideal candidate is hands-on, software-driven, and comfortable debugging across RTL, firmware, and silicon. Key Responsibilities Develop diagnostics for early silicon validation and debug Lead bring-up of ASIC silicon on characterization and validation platforms Validate power, reset, and clocking sequences, along with register access and initialization flows Design and build Python-based diagnostic frameworks for register access, configuration management, and test orchestration; convert debug procedures into automated test flows Develop diagnostics for SERDES links (training, BER, eye margining), Ethernet, PCIe, and UCIe / chiplet interfaces Use SDKs and internal tools to generate traffic, verify data path correctness, and validate counters and statistics Integrate and correlate behavior across RTL verification, emulation platforms, and silicon; develop correlation tools and methodologies Perform deep debug across ASIC logic, interfaces, and firmware interactions; isolate functional mismatches, timing/clocking issues, and protocol failures Develop automated diagnostics and integrate into regression frameworks and continuous validation pipelines Required Qualifications Bachelor’s with 10+ years or Master’s with 5+ years of relevant experience Strong experience in ASIC bring-up / post-silicon validation and hardware-software debug Strong programming skills in Python (mandatory), along with C/C++ and scripting Experience building diagnostic frameworks, automation tools, and test orchestration systems Preferred Qualifications Experience with SERDES , UCIe / chiplet architectures, or networking ASICs Familiarity with packet processor SDKs and emulation platforms Experience with BER testing tools and SERDES tuning/margining Exposure to CI/regression infrastructure for silicon validation Why Join Us? At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data center